【Introduction】Load transient test is a quick way to check the performance of power converter, it can reflect the adjustment speed of the converter and can highlight the stability problem of the converter. The converter’s load regulation characteristics, duty cycle limits, PCB layout issues, and input voltage stability can also be quickly revealed by this test.
Many Electronic devices contain computing and wireless connectivity functions, and these functional circuits often exhibit heavy pulse loading characteristics. In the face of rapidly changing pulse loads, the new DC/DC converter needs to have fast loop response characteristics to maintain the stability of the output voltage. In order to test this type of converter, it is important to have a load tool capable of generating rapid changes similar to the final application.
For general-purpose DC/DC converters with relatively stable loads, fast loop response characteristics are not required, so it is not necessary to test the load transient response characteristics. But applying fast step-changing loads to a regulator inevitably impacts regulation loops over a wide frequency band, and in some cases may even force them to operate below the limits of the control loop. By applying a rapidly changing step load to the output of a converter and analyzing its output voltage response, we can quickly and easily know whether the converter can maintain its The stability of the output voltage can also highlight possible loop stability issues, power supply stability issues, slope compensation issues, load regulation performance and PCB layout issues.
The figure shows the typical response of a current-mode buck converter to a fast 1A load transition with an output voltage normal value of VOUT NOM = 3.3V.
Current-mode converters cannot respond immediately to a step change in the load, so when a step change occurs in the load, the current supplied to the load initially comes from the stored energy in the output capacitor. In the face of the fast jump of the load, the ESR and ESL of the output capacitor work first, showing a small jump and spike in the output voltage, and then the discharge of the output capacitor begins, which will cause the output voltage to sink. . The drop in output voltage will be sensed by the error amplifier, which will accordingly cause VCOMP to rise, which in turn will increase the duty cycle of switch Q1 conducting, and the Inductor current will therefore increase to meet the increased load. During this process, the magnitude of the voltage sag and recovery time will depend on many factors: the size of the output capacitor, the magnitude of the load current jump and how fast it changes dI/dt, the level of compensation of the error amplifier and the overall control loop bandwidth.
Aside from the spikes caused by ESR and ESL, the converter’s step response process appears to be very smooth in this case, indicating that the converter’s behavior is robust. The voltage sag during the response is 75mV, equivalent to 2.2% of the output voltage, which is acceptable for most 3.3V supplies. It should be noted that if the output capacitor we use is a low ESR MLCC, the transition caused by the ESR is usually invisible.
Situations that may affect the response of the converter to a load step are roughly as follows:
1. Unstable control loop: When the control loop is not well adjusted, the control effect of the converter may be excessive, and the fast load step may cause the output voltage to fluctuate or ring, and in some cases may even enter into oscillation state.
2. Unstable power supply: A load jump at the output of the converter will cause a load jump of the power supply at the input of the converter. If the stability of the power supply is not good, or it is not well matched with the converter, the power supply itself may oscillate, which must be passed to the output of the converter, which looks like the control loop of the converter. Not as stable.
3. Slope compensation issue: Current mode converters use slope compensation to avoid subharmonic oscillations that may occur in high duty cycle applications. In order for slope compensation to work properly, an appropriate level of inductor current ripple is required. Improper inductor selection can result in improper current ripple and unstable subharmonics when exposed to step loads.
4. Operation at the duty cycle limit: When the converter is operating near the min/max duty cycle, a fast step change in the load will push the converter to the limit of the duty cycle, which will cause the output voltage to drop Excessive sinking or overshoot can sometimes even cause the converter to operate in protected mode.
5. PCB layout problem: If the impedance caused by PCB layout appears on the small signal link and power link of the converter, voltage loss and noise coupling will occur, which will deteriorate the response characteristics of the converter to step loads . If the load is far from the converter, the extra path impedance will cause the voltage to sag as the load increases, degrading the converter’s load regulation performance. In addition, the path inductance can also cause a ringing signal when the load jumps.
The figure below shows an example of poor and good load step response for a 3.3V/3A converter. The example on the left shows severe ringing of the regulator output voltage after a load transient, indicating marginal stability of the control loop. In most cases, this has to do with feedback loop compensation combined with the output capacitor value.
Implementation of the test: The customer’s previous products have not tested this parameter. After mass production, it was found that the back-end MCU was damaged by a large amount of overvoltage on the site. After replacing the DCDC chip, the manufacturer said that there will never be similar problems. But the customer is still worried and hope that we can help to measure it.
We adopted the following test scheme:
A MOSFET switch whose on/off is controlled by a pulse generator. The switching speed of the MOSFET switch can be adjusted with an optional RC network at its gate; the resistor R2 connected to the MOSFET drain can be selected according to the desired magnitude of dynamic load regulation; the resistor R1 is used to set the static base point of the load step. Step changes in load current can be measured with the current probe of an oscilloscope, while the output voltage of the converter needs to be measured at the output capacitor or point of load.
Using the AFG31252 to generate a fast pulse, the AFG31252 can easily generate a 4ns rising or falling edge.
Our test environment is set up:
We used this DCDC evaluation board, which is a BUCK switching regulator with a withstand voltage of only 52V. The evaluation board uses the BNC interface very intimately, which is convenient for us to measure the ripple and Load Transient.
We see that this chip must have done very special processing. Almost no voltage overshoot occurs when the load is subjected to large and fast steps. This must be specially optimized for voltage-sensitive loads, which is very important for some voltage-sensitive requirements that require a MCU directly behind the DCDC.
When we open the waveform, we can see that thanks to the 4ns rise speed of the AFG31000 series and the 120Mhz bandwidth of the TCP0030A high-speed current probe, we can observe that the current fast edge time speed is as high as 1.6A/us!
Is that enough? You can tell the customer that you can use it with confidence, and you will not burn the backend again. not at all!
From the manual, we know that because this chip supports multi-mode switching, in order to obtain the optimal efficiency under various operating current conditions.
So we still need to continue to test whether overvoltage occurs during various mode transitions.
After the load condition test for various working conditions, there is basically no serious overvoltage situation. The customer is very satisfied with the performance of this instrument after seeing it. Through this combination, we allow customers to understand the testing method of this demand on the one hand, and assist customers to achieve rapid mass production faster and more reliably on the other hand.
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